Tuesday, August 18, 2009

Using K-map in Full Adder Circuit

This post is labeled under Digital Design

One of best examples of implementing a circuit design using Karnaugh map (K-Map) simplification is a full adder.

Full adder is just a combination of two half adders where the second half adder has an input variable that serves as the carry in of the lowest significant carry bit. This can be derived by the use of truth tables. Further simplification can be done by apply boolean algebra theorems.

Special emphasis was given to Exclusive OR gate (XOR)to simplify the logic operation and plotting of the circuit in the experiment below.

Full Adder Experiment 5

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